High Performance Computing 1
Addressing Memory
•For illustration purposes, lets imagine 8 banks [128 or 256 common on chips today], with bank busy time (bbt) of 8 cycles between accesses. Thus we have:
•data     a13    a23    a33   a43   a14    a24   a34     a44
•data     a11    a21    a31   a41   a12    a22   a32     a42
•bank      1        2        3       4      5       6        7        8