High Performance Computing 1
Addressing Memory
•If we access data column-wise, we proceed through each bank in order. By the time we call a13, we (just) avoid bbt.
•On the other hand, if we access data row-wise, we get a11 in bank 1, a12 in bank 5, a13 in bank 1 again - so instead of access on clock cycle 3, we have to wait until cycle 9. Then we get a14 in bank 5 again on cycle 10, etc.
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